Milk-V Duo: Revolutionizing Microcontrollers with Dual-Core Arduino & Linux

The Milk-V Duo is an ultra-compact RISC-V development board built around the Sophgo CV1800B processor. It stands out in the microcontroller space by offering two independent RISC-V cores. One core operates as a fast, bare-metal or RTOS controller capable of running Arduino code, while the other is powerful enough to run a trimmed-down version of Linux (such as Alpine or custom buildroot distributions).

Dual-Core RISC-V Architecture

The dual-core setup is split between a 64-bit RISC-V core (operating up to 1GHz) and a 32-bit RISC-V core (operating up to 700MHz). This asymmetrical multi-processing (AMP) architecture allows engineers to allocate real-time sensor polling and actuator control to the 32-bit core, while utilizing the 64-bit core to run web servers, networking stacks, and data processing routines under Linux.

Inter-Core Communication (Mailbox API)

Communication between the Linux core and the Arduino/RTOS core is handled via a hardware-level Mailbox interface. This allows quick, low-latency message passing and register interrupts. Here is an example outline of how data packet exchange is triggered between cores:

// Inter-Core Mailbox Msg Structure
struct mailbox_msg {
    uint32_t cmd;       // Command code
    uint32_t data_len;  // Length of payload
    uint8_t payload[8]; // Inline data payload
};
// Send command to secondary core
void mailbox_send(struct mailbox_msg *msg) {
    MAILBOX_WRITE_REG(MAILBOX_CMD_REG, msg->cmd);
    MAILBOX_WRITE_REG(MAILBOX_DATA_REG, msg->payload);
    MAILBOX_TRIGGER_INTERRUPT();
}

Key Applications

The parallel capabilities make the Milk-V Duo highly suited for smart edge gateways, automated data logging nodes, and custom IoT systems where hardware level security and low latency are critical. By isolating network connectivity on the Linux core, the RTOS core remains completely deterministic and immune to networking hiccups.

Need help with Milk-V Duo RISC-V embedded development? Contact our engineering team.